STI Electronics, Inc. (STI), a premier full-service electronics organization, announces that

its Imbedded Component/Die Technology prototype was integrated into a Standard Missile-

2 flight test that was successfully conducted at Point Mugu, California on October 10, 

2008.  The San Diego based Aegis Destroyer, USS Kidd, using a Standard Missile–2 (SM-2)

Block IIIA missile, successfully intercepted a target during its midcourse phase of flight. 

The SM-2 missile is a member of the Standard family of missiles, one of the most reliable in

 the Navy's inventory, and is used to provide area defense against enemy aircraft and

anti-ship cruise missiles. The Navy’s Standard Missile Program Office used the flight test to

support a technology demonstration of STI’s Imbedded Component/Die Technology

prototype, validating the electrical and mechanical performance of this new and innovative

electronics-packaging concept.  The Navy’s Program Executive Office

for Integrated Warfare Systems and STANDARD Missile Program Office (PEO IWS 3A)

identified the need for more robust circuit cards for critical missile applications.  Current

industry trends toward all plastic encapsulated microcircuits (PEMs), lead-free solders, and

other factors threatened to significantly reduce the quality of military systems. After

reviewing what was available from industry, a test program was initiated in 2005 to

prototype a SM-2 circuit card utilizing STI’s patented manufacturing technology called

Imbedded Component/Die Technology.  In early 2007, STI’s IC/DT prototype was analyzed

and tested by SM-2 prime contractor Raytheon Missile Systems, which approved the

prototype as flight hardware for a future flight test. This included finite element analysis

(FEA) design modeling and prototype qualification testing per standard legacy performance

requirements and overstress test requirements. In October 2007, the IC/DT prototype’s

performance and robustness was demonstrated through the successful SM-2 flight test,

thus advancing the IC/DT technology to TRL 8 status.

 

 

STI’s patented Imbedded Component/Die Technology packaging approach addresses

miniaturization, thermal management, performance, reliability, and system capability

requirements through innovative design guidelines and materials selection in order to meet

form, fit, and function requirements. Elimination of external component packaging not only

reduces CCA size, weight, and electrical and thermal parasitics, but it enables the 3D

assembly of multiple components facilitating the design integration of key subsystems, i.e.

multiple CCAs, into a single high-density module.

Imbedded Component/Die Technology involves the use of unpackaged integrated circuit

components that are imbedded within a laminate substrate to an integrated thermally

conductive core. The imbedded core adds mechanical stability and provides passive cooling,

thus eliminating the need for additional thermal management materials. Flexible electrical

interconnects, such as wire bonds, provide a reliable means of connecting circuit

components. An electronically insulating coating covers the exposed surfaces, provides

rigidity to the wire bonds, and prevents moisture and contamination ingression. In addition,

a thermally conductive encapsulating material encases the circuit components providing

additional mechanical support, a second environmental barrier, and a thermal sink for the

dissipation of heat. This process improves the performance and rigidity of electronics

assemblies under extreme conditions such as temperature, vibration and g-force.

For further information on this or other IC/DT design efforts, contact Mark McMeen at (256)

705-5515 or mmcmeen@stielectronicsinc.com.

 

Files:
IC/DT

Date Posted:10/12/2007